1. Field of the Invention
The present invention relates to a method and board for forming a graphene layer, and, more particularly, to a method of forming a high-quality graphene layer using high pressure annealing and to a board used therein.
2. Description of the Related Art Graphene is a two-dimensional (2D) thin film resulting from planar arrangement of carbon atoms, and has a variety of advantages, including high electronic mobility, excellent mechanical strength, high transparency, etc. Furthermore, graphene may be currently manufactured using a processing technique such as deposition, etc., which is typically used, and is thus receiving attention as a next-generation material.
A graphene layer having the above properties is conventionally formed in such a manner that a silicon carbide (SiC) board is annealed at a high temperature in a high vacuum or that graphite oxide dispersed in a solvent is reduced. Recently, formation of a graphene layer using chemical vapor deposition (CVD) is mainly utilized due to its ability to form a graphene layer having a large area at low cost.
The method of forming a graphene layer using CVD refers to a method of growing graphene by allowing a hydrocarbon-based gas to flow while heating a catalyst metal such as nickel (Ni), copper (Cu), etc. to a high temperature. Recently, a method of growing a graphene layer on a metal thin film by exposing a copper (Cu) board to a high temperature of about 900˜1000° C. while allowing methane (CH4) gas to flow to the board is mainly employed. However, this method is problematic because the surface of copper becomes essentially severely rough after a high temperature process due to the low melting point of copper (1084° C.).
For example, when a copper metal thin film having a thickness of 300 nm is heated at 1000° C. for 10 min to grow graphene, the depth of the grain boundary thereof is known to exceed 100 nm, and thereby a graphene layer in monolayer form is grown thereon along the curvature of about 100 nm, thus forming a structure having a three-dimensional (3D) curvature. The graphene layer thus grown is utilized by being transferred to a silicon wafer having silicon oxide or an insulating wafer such as glass. As such, while the graphene layer grown along the grain boundary of metal is transferred to a planar wafer, it is mechanically pressed and thus wrinkles are formed on the planar structure of the graphene layer.
In order to prevent damage to the graphene layer during transfer of the graphene layer grown on metal to the insulating wafer, a protective layer is formed from PMMA (Polymethyl methacrylate) using spin coating. In this procedure, as PMMA is applied to be thicker on the curvature formed at the grain boundary of the metal thin film, such PMMA is not completely removed in a PMMA removal process after the transfer process and is thus left behind as a residue. The PMMA residue thus formed partially dopes the graphene layer.
Such wrinkles and residue are very randomly distributed, and may degrade the properties of a graphene device made using the graphene layer, and for example, problems such as low Dirac voltage uniformity of a graphene device, low carrier mobility, low on/off ratio, etc. are caused.